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PDF Solutions, Inc. (NASDAQ: PDFS) is the leading provider of yield improvement technologies and services for the IC manufacturing process lifecycle. PDF Solutions offers solutions that are designed to enable clients to lower costs of IC design and manufacture, enhance time to market, and improve profitability by addressing design and manufacturing interactions from product design to initial process ramps to mature manufacturing operations.
PDF Solutions' Characterization Vehicle® (CV®) infrastructure is used by leading IDMs and Foundries to accelerate process yield learning. PDF Solutions' industry leading yield management system software, dataPOWERŪ, and fault detection and classification software, Maestria®, enhance yield improvement and production control activities at leading fabs around the world. Headquartered in San Jose, Calif., PDF Solutions operates worldwide with additional offices in China, France, Germany, Italy, Japan and Korea.
Process-Design Integration solutions
PDF's innovative Process-Design Integration technologies and services enable leading semiconductor companies to increase the yield and performance of deep sub-micron integrated circuits (ICs). By simulating the statistical interactions of IC product design and manufacturing process, our proven solutions offer clients reduced time to market, increased IC yield and performance, and enhanced product reliability and profitability.
PDF Solutions works with the world's leading integrated device manufacturers, fabless semiconductor companies, and foundries that employ cutting-edge manufacturing technologies.
Our solutions combine proprietary process and design simulation with analysis software, comprehensive Characterization Vehicle™ test chips, proven yield and performance enhancement methodologies, and consulting services. Using these capabilities, we predict and help improve manufacturing results before product ramp begins.
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Benefits
Clients receive actionable deliverables that enable increased IC yield, performance, and reliability. Both strategic and tactical answers to fab integration issues are derived from feature-based yield simulation technology. Iterations of design or process occur in software, savings costs of lithographic mask-sets, silicon wafers, and lost time.
Time-to-market reduced
Faster time to yielding first-silicon, when designs are tuned to process.
Time-to-volume reduced
Better sustained yield, when optimized designs run with optimized processes. Significantly accelerated yield learning relative to historic results.
Profitability increased
Reduced overall costs, often with greater volume and/or average-selling-prices; for example, one high-volume IC client realized more than $100 million in cost savings.
Clients
Clients include integrated device manufacturers (IDMs), foundries, and fabless IC producers. These companies produce microprocessors, ASICs, memory, communications, and mixed-signal chips with today's leading-edge manufacturing technologies.
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