Abstract – Deploying OPC that is robust over the process window is becoming more and more challenging as geometries shrink. This challenge has a major impact in time-to-market and yield of new products. This paper describes a litho simulator calibration flow using a streamlined OPC verification methodology. This new methodology successfully bridges design and manufacturing to accelerate the OPC development process and proactively identifies weak OPC locations that can reduce yield. The method includes an accurate simulator calibration using automatically obtained ‘on silicon’ measurement data, followed by full-chip litho simulation using the calibrated model to identify potential hot spots on product. The method also enabled a short cycle feedback loop to the OPC model generation resulting in improved OPC optimization and verification.
Keywords: OPC, DFM, Hot-spots, CV, Characterization Vehicle, Yield